Magnetic tunneling junctions (MTJ) with two ferromagnetic layers separated by a tunneling oxide layer have been widely studied for use as a random-access memory element. Usually one of the ferromagnetic layers is in a fixed direction (the pinned layer), while the other layer is free to switch its magnetization direction, and is usually called the free layer.
For magnetic random access memory (MRAM) applications, the MTJ is usually formed so that it exhibits an anisotropy, such as shape anisotropy. In its quiescent state, the free layer magnetization lies along the orientation of the pinned layer, either parallel or anti-parallel to that layer's magnetization. During the read operation a small current is sent through the MTJ junction to sense its resistance which is low for parallel magnetization and high for anti-parallel magnetization. The write operation provides Hs, the magnetic field (via bit/word lines) that is needed to switch between the two states, its magnitude being determined by the anisotropy energy of the element.
The free layer is used during both read and write operations. The cell to be programmed lies at the intersection of a bit and a word line so the fields associated with these bit/word lines can inadvertently affect other cells that lie under them, creating the so-called half-select problem which may cause unintended half selected cells to be accidentally switched.
Another challenge facing this design is that it is very difficult to scale down to smaller dimension since the switching field from the shape anisotropy is inversely proportional to its dimensions (HstMsT/w where w is the smallest dimension of the cell) while the field generated by the current is roughly l/w. The current l provided by its transistor will scale down as w scales down, for future technologies, leaving H roughly constant. Thus for future smaller cells, more current will be needed.
This conventional MRAM design has several shortcomings:    a) Coupling between the free layer and the pin layer, due to the roughness of the oxide layer, is often called the orange peel effect. This coupling induces a bias in the switching threshold of the free layer magnetization. The variation of this coupling thus causes variations in the switching threshold during write operation.    b) The magnetic charges at the edges of the pinned layer also produce a bias. Again, variations of this bias induce variations in the switching threshold.    c) For reliable switching behavior, the ferromagnetic free layer is generally limited to materials with small coercivity. This makes it difficult to use certain materials that have a large magneto-resistive (MR) ratio (Dr/r). For example, CoFeB and CoFe with high Fe concentration have good MR ratios, but are generally poor for magnetic softness.    d) The half select problem discussed above.    e) The scaling down difficulties discussed above.    f) Can only store one bit (in state 0 or 1) per MRAM cell.
An alternative design, called thermal assisted switching (TAS-MRAM), that addresses the half-select and scale-down issues, is illustrated in FIG. 1. In this schematic version, two AFM layers 11 and 15 are seen to be exchange coupled to reference layer 12 and free layer 14, respectively. Separating layers 12 and 14 is dielectric tunneling layer 13. Here, the MRAM is not using shape anisotropy to maintain its stored information. Instead, a second antiferromagnetic layer (AFM), that has a low blocking temperature, is added to exchange bias the free layer.
The free layer magnetization is now determined by this second AFM whose direction is determined by sending a heating current through the cell to heat the cell above the second AFM blocking temperature while not exceeding the first AFM Block temperature. The field generated by the bit line current provides the aligning field for the second AFM during cooling thereby setting the free layer magnetization parallel or anti-parallel to that of the pinned layer.
A transistor is needed for each cell to provide the heating current which eliminates the half select problem since only the selected cell is heated while all the other cells under bit line will have the exchange bias from its second AFM layer unchanged. Also, since the temperature rise due to joule heating is roughly: T t $(l/W)2/Cp2, where $ is the effective resistivity of the MTJ stack, cp is the specific heat capacity of the MRAM cell, and is the effective thickness of the MTJ stack. So the temperature rise from the heat current is constant as the dimension scales down. The exchange field on the free layer from AFM2 is also constant if the film thicknesses of the free layer and AFM are not changed.
This TAS-MRAM design has several shortcomings: It does not solve problems a, b, c, or f listed above. Additionally,    i) The heating current passes through the MTJ, so the temperature cannot be raised too high without upsetting the first AFM (used for the reference layer).    ii) The MTJ has high resistance which means that the heating current will cause a large voltage across the MTJ, that is likely to break down the tunneling layer (which typically operates below 2 volts, depending on tunneling layer thickness. As density increases, the MTJ resistance needs to be reduced which can only be achieved by an even thinner tunneling layer which means an even lower break-down voltage.    iii) The transistor that provides the heating current may be quite large, making the TAS-MRAM cell very big—not a desirable feature for a high density MRAM design.    iv) The heating current will generate a circumferential field causing the free layer to be in a vortex state. A very large bit line current is needed to remove this vortex.
All of the shortcomings listed above for both designs are solved by the present invention, while maintaining the advantages of TAS-MRAM, as we will disclose in detail below.
A routine search of the prior art was performed with the following references of interest being found:
U.S. Pat. No. 6,806,096 (Kim et al) discloses nitride over the cap layer, oxide fill, and CMP. U.S. Pat. No. 6,881,351 (Grynkewich et al) describes depositing plasma-enhanced nitride, then oxide over the MTJ stack, then CMP. U.S. Pat. No. 6,174,737 (Durlam et al) describes forming a dielectric layer over the MTJ stack and planarizing by CMP. U.S. Pat. No. 6,858,441 (Nuetzel et al) discloses depositing a nitride layer, then a resist layer used in CMP of conductive material forming alignment marks after forming MTJ elements.
U.S. Pat. No. 6,815,248 (Leuschner et al) and U.S. Pat. No. 6,783,999 (Lee) show using nitride or oxide as a fill material over MTJ elements, then CMP. U.S. Pat. No. 6,784,091 (Nuetzel et al) teaches planarizing a blanket nitride layer on top of the MTJ stack.